1. Field of the Invention
One embodiment of the present invention relates to a storage system and a storage control circuit.
Note that one embodiment of the present invention is not limited to the above technical field. The technical field of the invention disclosed in this specification and the like relates to an object, a method, or a manufacturing method. In addition, one embodiment of the present invention relates to a process, a machine, manufacture, or a composition of matter. Specifically, examples of the technical field of one embodiment of the present invention disclosed in this specification include a semiconductor device, a display device, a light-emitting device, a power storage device, an imaging device, a memory device, a method for driving any of them, and a method for manufacturing any of them.
2. Description of the Related Art
A storage system is a system for collecting, managing, or choosing large complicated data sets such as big data. In a storage system, a flash memory is employed as storage. A flash memory is superior to a hard disk drive (HDD) in quietness, impact resistance, and the like and is therefore being employed as storage.
Although having a plurality of advantages, a flash memory is slower in data input and output than a dynamic random access memory (DRAM) or a static random access memory (SRAM). For this reason, a storage system additionally includes a cache memory which temporarily stores data for data input and output (see, for example, Patent Document 1). For example, a DRAM is employed as the cache memory.
A DRAM might lose data in the event of cut-off of power supply such as instantaneous power interruption. Therefore, as a countermeasure against data loss, a storage system is provided with a power storage device such as a capacitor or a battery so that data in a cache memory is stored in a flash memory (see, for example, Patent Document 2).
As a cache memory of a storage system, Patent Document 3 discloses a configuration with a memory cell including a transistor containing an oxide semiconductor (OS) in a channel formation region (this transistor is hereinafter referred to as an OS transistor). In Patent Document 3, the memory cell including the OS transistor is described as being capable of retaining data even when refreshed less frequently than a common DRAM.